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Amlogic T972 Quad Core Advantages Explained

Amlogic T972 Quad Core Advantages Explained

Tomato www.sztomato.com 2021-01-05 08:42:59

Amlogic T972 Quad Core Advantages Explained


Amlogic T972 Quad Core Advantages Explained


Amlogic T972 is an advanced application processor designed for worldwide UHD TV applications. It integrates a powerful CPU/GPU subsystem, a best-in-class HDR image processing pipeline, a secured 8K/4K video CODEC engine with all major peripherals to form the ultimate cost-effective smart TV chip.
The main system CPU is a quad-core ARM Cortex-A55 CPU with shared L3 cache to improve system performance. In addition, the Cortex-A55 CPU includes the NEON SIMD co-processor to improve soft- ware media processing capability.
The graphic subsystem consists of two graphic engines and a flexible video/graphic output pipeline. The ARM Mali-G31 MP2 GPU handles all OpenGL ES 3.2, Vulkan 1.1 and OpenCL 2.0 graphic pro- grams, while the 2.5D graphics processor handles additional scaling, alpha, rotation and color space conversion operations. Together, the CPU and GPU handle all operating system, network, user-inter- face and game related tasks.
Amlogic Video Engine (AVE-10) is a subsystem which uses dedicated hardware video decoders and encoders to offloads the Cortex-A55 CPUs from all video CODEC processing. AVE-10 is capable of decoding 4K2K resolution video within Trusted Video Path (TVP) for secured DRM applications. It sup- ports all major video formats including MVC, MPEG-1/2/4, VC-1/WMV, AVS +, AVS2, RealVideo, MJPEG, H.264, H265-10, VP9-10 and also JPEG.
The video/graphics output pipeline includes HDR10+, HDR10, HLG and Technicolor Prime HDR proc- essing, BT.2020/ BT.2100 processing, motion compensated and motion adaptive de-interlacer, flexible programmable super scalar, local dimming and many picture enhancement filters before passing the enhanced image to the video output ports. The 8-lane V-by-one and dual-channel LVDS interface are available for UHD/FHD TV panel and 12-lane P2P interface with internal flexible timing control module Optional for UHD TCON-less panels including CEDS, CHPI, CMPI and iSP.
3 HDMI 2.1 receiver ports plus two sets of CVBS composite analog input ports are available. The HDMI ports support HDCP 1.4/2.2 and can receive up to 4K2K HDR video.
Amlogic T972 integrates the ATV demodulators which fully support worldwide analog TV standards including NTSC, PAL, and SECAM. DTV broadcasting streams can be received by the internal DTMB demodu- lator or the transport stream (TS) interface. The built-in three demux can process the TV streams from the serial transport stream input interface, which can connect to external tuner/demodulator. DVB Common Descrambler 1.0 is supported in addition to DES, Triple DES (TDES/3DES) and AES streaming crypto formats. An integrated ISO7816 controller is included for interfacing to external smart card.
Amlogic T972 is optimized for low power far-field voice application. The powerful main CPU can enable top of the line audio front end and wake word algorithms. It also has built-in Voice Activity Detection (VAD) module for ultra-low power operations during system standby and full digital MIC interface including PDM, TDM and I2S up to 8 channels are available.
Amlogic T972 SoC integrates rich advanced network and peripheral interfaces, including a 10/100/1000M Ethernet MAC with RGMII, 10/100M Ethernet PHY, USB 2.0 high-speed port, SDIO 3.0 controller, eMMC 5.0 controller, SLC NAND controller and multiple SDIO/SD card controllers, UART, I2C, high- speed SPI PWMs and a built-in IR blaster. The flexible and programmable QoS-based switch fabric and memory controller tie all the processing cores and peripherals together and connects to the DRAM memory bus.
Standard development environment utilizing SecureOS, Linux and GNU/GCC Android tool chain is supported. Please contact your AMLOGIC sales representative for more information.

CPU Sub-system
Quad core ARM Cortex-A55 CPU
ARMv8.2 architecture with Neon extensions
Unified system L3 cache
Advanced TrustZone security system
Application based traffic optimization using internal QoS-based switching fabrics
CoreSight debugger support

3D Graphics Processing Unit
ARM Mali-G31 MP2 GPU
4-wide warps, dual texture pipe, 2x 4-wide execution engines (EE)
Concurrent multi-core processing
OpenGL ES 3.2, Vulkan 1.1 and OpenCL 2.0 support

2.5 D Graphics Processor
Fast bitblt engine with dual inputs and single output
Programmable raster operations (ROP)
Programmable polyphase scaling filter
Supports multiple video formats 4:2:0, 4:2:2 and 4:4:4 and multiple pixel formats (8/16/24/32 bits graphics layer)
Fast color space conversion
Advanced anti-flickering filter

Crypto Engine
AES block cipher with 128/256 bits keys, standard 16 bytes block size and streaming ECB, CBC and CTR modes
DES/3DES block cipher with ECB and CBC modes supporting 64 bits key for DES and 192 bits key for 3DES
Hardware key-ladder operation and DVB-CSA for transport stream encryption
Built-in hardware True Random Number Generator (TRNG) and SHA-1/SHA-2 engine

Video/Picture CODEC
Amlogic Video Engine (AVE-10) with dedicated hardware decoders up to 4Kx2K@75fps
Video/Picture Decoding
VP9 Profile 2-10 up to 8Kx4K@24fps or 4Kx2K@60fps
H.265 HEVC MP-10@L5.1 up to 8Kx4K@24fps or 4Kx2K@60fps
AVS2-P2 Profile up to 4Kx2K@60fps
H.264 AVC HP@L5.1 up to 4Kx2K@30fps
H.264 MVC up to 1080P@60fps
MPEG-4 ASP@L5 up to 1080P@60fps (ISO-14496)
WMV/VC-1 SP/MP/AP up to 1080P@60fps
AVS-P16(AVS+) /AVS-P2 JiZhun Profile up to 1080P@60fps
MPEG-2 MP/HL up to 1080P@60fps (ISO-13818)
MPEG-1 MP/HL up to 1080P@60fps (ISO-11172)
RealVideo 8/9/10 up to 1080P@60fps
Multiple language and multiple format sub-title video support
MJPEG and JPEG unlimited pixel resolution decoding (ISO/IEC-10918)
Supports JPEG thumbnail, scaling, rotation and transition effects
Supports *.mkv,*.wmv,*.mpg, *.mpeg, *.dat, *.avi, *.mov, *.iso, *.mp4, *.rm and *.jpg file formats

9th Generation Advanced Amlogic TruLife Image Engine
Supports HDR10/10+, HLG, Technicolor Prime HDR
Motion compensated noise reduction and 3D digital noise reduction for random noise
Block noise, mosquito noise, spatial noise, contour noise reduction
Motion compensated and motion adaptive de-interlacer
Edge interpolation with low angle protection and processing
3:2/2:2 pulldown and Video on Film (VOF) detection and processing
Smart sharpness with SuperScaler technology including de-contouring, de-ring, LTI, CTI, de- jaggy, peaking
Local contrast and dynamic non-Linear contrast for detail enhancement
3D LUTs with 17x17x17 nodes, provide 4913 different control points, which is competent for matching calibrated displays to a target colorspace
High precision HSL color space based color management with low saturation protection, inde- pendent luma/hue/saturation adjustment to achieve blue/green extension, fresh tone correction, and wider gamut for video
Video mixer: 2 video planes and 2 graphics planes
Independent HDR re-mapping of video and graphic layer
Local dimming control for high nits backlights

LCD Panel Output
8-lane V-By-One output with 1, 2, 4 regions supported, up to 4Kx2K 60Hz resolution
Dual-channel LVDS output supporting up to 1920x1080 60Hz resolution
Built-in (1-port 6-pair)/(2-port 3-pair) mini-LVDS output with programmable HD/FHD timing con- troller Optional up to 1920x1080Hz resolution
12-lane CEDS/CHPI/CMPI/iSP output with programmable UHD timing controller Optional for UHD TCON-less panel, up to 4Kx2K 60Hz resolution
Three independent Gamma table for LCD panel tuning
Dithering logic for mapping to different LCD panel color depth

Video Input/output Interface
3x HDMI 2.1 receiver ports with Dynamic HDR, ARC, HDCP 1.4 /2.2, 4Kx2K@60 max resolution input
2x CVBS 480i/576i standard definition inputs
Supports CVBS (PAL/NTSC) bypass output
ITU 601/656 parallel camera input supporting 8-bit RGB565, CCIR656, CCIR601, YUV422, YCbCr422

Audio CODEC and Input/Output
Supports MP3, AAC, WMA, RM, FLAC, Ogg, Dolby DTS Audio Optional and programmable with 7.1/5.1 down-mixing
Low-power VAD and internal AEC loopback path
3 built-in TDM/PCM/I2S ports with TDM/PCM mode up to 384kHz x32bits x 8ch or 96kHzx 32bits x 32ch and I2S mode up to 384kHz x 32bits x 8ch
Digital microphone PDM voice input with programmable CIC, LPF & HPF, support up to 8 DMICs
Built-in serial digital audio SPDIF/IEC958 output
2 L/R analog input channels and 2 L/R output channels
Supports concurrent dual audio stereo channel output with combination of I2S+PCM
Supports Audio EQ/DRC for audio speaker

TV Demodulator
Standard compliant NTSC, NTSC-J, PAL-BG, PAL-DK1, PAL-I, PAL-DK, PAL-M, PAL-N, SE- CAM-DK2, SECAM-DK3, SECAM-L ATV demodulators
Worldwide analog TV audio standard: BTSC, A2, EIA-J and NICAM
Supports Teletext, close caption, V-chip
DTMB/DVB-C/ DTV demodulators
Build-in VIF demodulator supports low IF interface from tuner module

DTV Broadcasting Interface
3x Transport stream (TS) input interface with built-in demux processor for connecting to external digital TV tuner/demodulator
Built-in PWM, I2C and SPI interfaces to control tuner and demodulator
Integrated ISO 7816 smart card controller

Memory and Storage Interface
32-bit DRAM memory interface with dual ranks and max 4GB total address space
Compatible with JEDEC standard DDR3-2133 /DDR3L-2133 /DDR4-2666 /LPDDR3-2133
SDSC/SDHC/SDXC card and SDIO interface with 1-bit and 4-bit data bus width supporting spec version 2.x/3.x/4.x DS/HS modes up to UHS-I SDR104
eMMC memory interface with 1/4/8-bit data bus width fully supporting spec version 5.0 HS400
SLC NAND Flash controller
Built-in 4K bits OTP memory for secured key storage

Network Interface
IEEE 802.3 10/100/1000M Ethernet MAC with RGMII interface
10/100M Ethernet PHY interface
WiFi/IEEE802.11 supporting via USB or SDIO
Bluetooth supporting via USB or UART
Network interface optimized for mixed WIFI and BT traffic

Integrated I/O Controllers and Interfaces
Triple USB 2.0 high-speed USB I/O, two USB Hosts and one USB OTG
Multiple UARTs, I2Cs and PWMs SPI interface
Programmable remote control input circuitry and IR-blaster output
Built-in 10bit SAR ADC with 4 input channels
General Purpose IOs with built-in pull up and pull down
System, Peripherals and Misc. Interfaces
Integrated general purpose timers, counters, DMA controllers
24 MHz crystal input
Embedded debug interface using ICE/JTAG

Power Management
Multiple internal power domains controlled by software
Multiple sleep modes for CPU, system, DRAM, etc.
Multiple internal PLLs to adjust the operating frequencies
Multi-voltage I/O design for 1.8V and 3.3V

Trustzone based Trusted Execution Environment (TEE)
Secured boot, encrypted hardware self-setup OTP, encrypted DRAM with memory integrity checker, hardware key ladder and internal control buses and storage
Separated secure/non-secure Entropy true RNG
Pre-region/ID memory security control and electric fence
Hardware based Trusted Video Path (TVP), and secured contents (needs SecureOS software)
Secured IO and secured clock